1. Technical Field
Embodiments discussed herein generally relate to computer memory systems. More particularly, certain embodiments variously relate to configuration of a memory device after a power state transition.
2. Background Art
Booting up a computer platform, or otherwise transitioning the platform from a state for lower power consumption to a state for higher power consumption, often takes longer than desired. Moreover, as technological improvements continue to push for implementation of smaller platforms—e.g. for tablets and various other handheld devices—the demand for increased power efficiency and the demand for faster recovery from low power states are increasingly at odds with one another.
Consequently, delays associated with power transitions can be untenable when a device needs to be activated on an expedited basis. One constraint to provide sufficiently fast boot-up (or other power transitions) is the need to prepare volatile memory for operation after a power state which has allowed information stored in such volatile memory to degrade. After such a power state, one or more locations in the memory may be in a potentially invalid state, such as when one or more memory cells are in indeterminate logical states between logic “high” and logic “low”.
Operations to assure that a memory device is in a known-valid state slow boot operations and other transitions, and for at least this reason are a constraint on the usefulness of certain computer platforms in various applications. Accordingly, there is a need for mechanisms which, for example, allow for faster boot-up or other operations associated with a power state transition of computer systems.